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FEATURES Quad High-Speed Current Feedback Amplifier with Disable -3 dB Bandwidth 350 MHz @ G = 1 Slew Rate 2400 V/ s, VS = 12 V Drives High Capacitive Loads Settling Time to 0.1% in 35 ns; 300 pF Load, 6 V Step Settling Time to 0.1% in 18 ns; 5 pF Load, 2 V Step Low Power Operates on +5 V to 12 V (+24 V) 4 mA/Amplifier Supply Current Excellent Video Specs (RL = 150 , G = 2) Gain Flatness 0.1 dB to 70 MHz 0.04% Differential Gain 0.09 Differential Phase Crosstalk -58 dB @ 5 MHz THD -72 dBc @ 5 MHz Outstanding DC Accuracy VOFFSET is 2 mV (Typ) IBIAS is 3 A (Max) 16-Lead SOIC Package APPLICATIONS LCD Column Drivers High-Performance Test Equipment Video Line Driver ATE PRODUCT DESCRIPTION
1 2 3
Quad 350 MHz 24 V Amplifier AD8024
FUNCTIONAL BLOCK DIAGRAM
16 15 14 13
VCC 4 DIS 5
6 7 8
AD8024AR
VEE DGND
12 11 10 9
1V
20ns
VIN
The AD8024 is a low settling time, high-speed, high output voltage quad current feedback operational amplifier. Manufactured on ADI's proprietary XFHV high-speed bipolar process, the AD8024 is capable of driving to within 1.3 V of its 24 V supply rail. Each amplifier has high-output current capability and can drive high capacitive loads. The AD8024 outputs settle to 0.1% within 35 ns into a 300 pF load (6 V swing). The AD8024 can run on both +5 V as well as 12 V rails. Slew rate on 12 V supplies is 2400 V/s. DC Characteristics are outstanding with typical 2 mV offset, and 3 A maximum input bias current. High-speed disable pin allows the AD8024 to be shut down when not in use. Low-power operation is assured with the 4 mA/Amplifier supply current draw. The high voltage drive capability, low settling time, high slew rate, low offset, and high bandwidth make the AD8024 ideally suited as an LCD column driver, a video line driver, and for use in high-performance test equipment. The AD8024 is available in a 16-lead SOIC package.
VOUT
2V
Figure 1. Pulse Response Driving a Large Load Capacitance, C L = 300 pF, G = 3, RFB = 2.32 k, RS = 10.5 , RL = 1 k, VS = 7.5 V
REV. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2000
AD8024-SPECIFICATIONS (@ T = 25 C, V =
A S
7.5 V, CLOAD = 10 pF, RL = 150
Min
, unless otherwise noted)
Typ 200 25 390 30 18 Max Unit MHz MHz V/s ns ns
Model DYNAMIC PERFORMANCE Bandwidth (3 dB) Bandwidth (0.1 dB) Slew Rate Settling Time to 0.1%
Conditions
RFB = 800 , No Peaking, G = 3 160 No Peaking, G = 3 370 6 V Step, G = 3, CLOAD = 300 pF TA = 25C to 85C, 3 V (6 V Step) CLOAD = 300 pF, RS = 10.5 , RLOAD > 1 k, RFB = 2.32 k 1 V (2 V Step), CLOAD = 5 pF, RS = 0 , RLOAD > 1 k, RFB = 750 k fC = 5 MHz, RL = 1 k fC = 5 MHz, RL = 150 f = 10 kHz f = 10 kHz (-IIN) f = 3.58 MHz, G = 2 f = 3.58 MHz, G = 2 TMIN to TMAX
NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion Input Voltage Noise Input Current Noise Differential Gain (RL = 150 ) Differential Phase (RL = 150 ) DC PERFORMANCE Input Offset Voltage Offset Drift +Input Bias Current -Input Bias Current Open-Loop Transresistance INPUT CHARACTERISTICS Input Resistance +Input -Input Input Capacitance Input Common-Mode Voltage Common-Mode Rejection Ratio Input Offset Voltage -Input Current +Input Current OUTPUT CHARACTERISTICS Output Voltage Swing RL = 1 k RL = 150 Linear Output Current Max Dynamic Output Current Capacitive Load Drive MATCHING CHARACTERISTICS Dynamic Crosstalk (Worst Between Any 2) DC Input Offset Voltage Match Input Current Match POWER SUPPLY Operating Range Total Quiescent Current
-72 -67 3 8 0.04 0.09 2 1.5 1 1 1.2 0.840 5 7.5 3
dBc dBc nV/Hz pA/Hz % Degrees mV V/C A A M M
0.850 TMIN to TMAX
TMIN to TMAX TMIN to TMAX -VS + 1.2 62
1 135 2 +VS - 2 66 0.2 1
M pF V dB A/V A/V
VOL - VEE VCC - VOH VOL - VEE VCC - VOH Error <3%, R1 = 50
35
0.8 1.1 1.0 1.3 50 300 1000
1.0 1.3 1.35 1.55
V V V V mA mA pF
G = 2, f = 5 MHz
-58 0.4 0.1 1.5 2.0 24 12 17 1
dB mV A V V mA mA mA dB A/V A/V
Single Supply Dual Supply TMIN to TMAX Disable = HIGH
5 2.5 16 19.5 0.5 64 70 0.03 0.07
Power Supply Rejection Ratio Input Offset Voltage -Input Current +Input Current
VS = 6.5 V to 8.5 V
-2-
REV. B
AD8024
Model DISABLE CHARACTERISTICS Off Isolation Off Output Impedance Turn-On Time Turn-Off Time Switching Threshold OPERATING TEMPERATURE RANGE
Specifications subject to change without notice.
Conditions f = 6 MHz
Min
Typ 49 20 25 20 1.6
Max
Unit dB pF ns ns V C
VTH - DGND
1.3 -40
1.9 +85
ABSOLUTE MAXIMUM RATINGS*
Output Short Circuit Limit
Supply Voltage VCC - VEE . . . . . . . . . . . . . . . . . . . 26 V Total Internal Power Dissipation Small Outline (R) . . . . . 1.0 Watts (Observe Derating Curve) Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage . . . . . . . . . . . . . . . 3 V (Clamped) Output Voltage Limit Maximum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +VS Minimum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -VS Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curve Storage Temperature Range R Package . . . . . . . . . . . . . . . . . . . . . . . . -65C to +125C Operating Temperature Range AD8024A . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
The AD8024's internal short circuit limitation is not sufficient to protect the device in the event of a direct short circuit between a video output and a power supply voltage rail (VCC or VEE). Temporary short circuits can reduce an output's ability to source or sink current and therefore impact the device's ability to drive a load. Short circuits of extended duration can cause metal lines to fuse open, rendering the device nonfunctional. To prevent these problems, it is recommended that a series resistor be placed as close as possible to the outputs. This will serve to substantially reduce the magnitude of the fault currents and protect the outputs from damage caused by intermittent short circuits. This may not be enough to guarantee that the maximum junction temperature (150C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curve in Figure 2. It must also be noted that in (noninverting) gain configurations (with low values of gain resistor), a high level of input overdrive can result in a large input error current, which may then result in a significant power dissipation in the input stage. This power must be included when computing the junction temperature rise due to total internal power.
2.5 MAXIMUM POWER DISSIPATION - Watts TJ = 150 C
ORDERING GUIDE
Model AD8024AR-16 Temperature Range Package Description Package Option R-16A
-40C to +85C 16-Lead Narrow-Body SOIC
2.0
Maximum Power Dissipation
The maximum power that can be safely dissipated by the AD8024 is limited by the associated rise in junction temperature. The maximum safe junction temperature for the plastic encapsulated parts is determined by the glass transition temperature of the plastic, about 150C. Temporarily exceeding this limit may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175C for an extended period can result in device failure.
1.5 16-LEAD SOIC
1.0
0.5 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 AMBIENT TEMPERATURE - C
80 90
Figure 2. Maximum Power Dissipation vs. Ambient Temperature
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8024 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. B
-3-
AD8024-Typical Performance Characteristics
12 TA = 25 C
25 TA = 25 C
COMMON-MODE VOLTAGE - Volts
TOTAL SUPPLY CURRENT - mA
10
20
8 -VCM 6 +VCM 4
15
10
5
2
0
0
2
4
6 8 SUPPLY VOLTAGE -
10 Volts
12
0
2
4 6 8 SUPPLY VOLTAGE -
10 Volts
12
14
Figure 3. Input Common-Mode Voltage Range vs. Supply Voltage
Figure 6. Total Supply Current vs. Supply Voltage
7.0 VS = 6.5 OUTPUT VOLTAGE SWING - V +SWING 6.0 5.5 5.0 4.5 4.0 3.5 3.0 10 7.5V -SWING
24 22
TOTAL SUPPLY CURRENT - mA
20 VS = 18 12V
16 VS = 14 12 7.5V
100 1k LOAD RESISTANCE -
10k
10 -60
-40
-20
0 20 40 TEMPERATURE - C
60
80
100
Figure 4. Output Voltage Swing vs. Load Resistance
Figure 7. Total Supply Current vs. Temperature
25 TA = 25 C
OUTPUT VOLTAGE SWING - V p-p
3
SWING (NO LOAD)
INPUT BIAS CURRENT - A
2
VS =
7.5V
20 SWING (RL = 150 )
-IB
15
1 +IB
10
0
5
0
2
3
4
5 7 9 6 8 10 SUPPLY VOLTAGE - Volts
11
12
13
-1 -60
-40
-20
0 20 40 TEMPERATURE - C
60
80
100
Figure 5. Output Voltage Swing vs. Supply Voltage
Figure 8. Input Bias Current vs. Temperature
-4-
REV. B
AD8024
2.5
10M 1M
INPUT OFFSET VOLTAGE - mV
VS = 2.0
7.5V
VS = 7.5V
TRANSIMPEDANCE -
100k 10k 1k
1.5 VS = 12V
100
1.0
10 1 0.01
0.5 -60
-40
-20
0 20 40 TEMPERATURE - C
60
80
100
0.1
1 10 FREQUENCY - MHz
100
1000
Figure 9. Input Offset Voltage vs. Temperature
Figure 12. Open-Loop Transimpedance vs. Frequency, RL = 150
90 80 VS = 12V
100 VS = 7.5V
100
COMMON-MODE REJECTION - dB
CURRENT NOISE - pA/ Hz
VOLTAGE NOISE - nV/ Hz
70 VS = 60 50 40 R 30 VCM 20 R 10 R R 7.5V
+INOISE
10 -INOISE VNOISE
10
1 0.01
0.1
1 FREQUENCY - kHz
10
1 100
0 1 10 FREQUENCY - MHz 100
Figure 10. Input Current and Voltage Noise vs. Frequency
Figure 13. Common-Mode Rejection vs. Frequency
10000 G = +1 VS = 7.5V
POWER SUPPLY REJECTION - dB
60 VS = 50 7.5V
1000
OUTPUT IMPEDANCE -
40
100
30 +PSRR 20 -PSRR 10
10
0 1 10 FREQUENCY - MHz 100 200
0 1 10 100 FREQUENCY - MHz 1000
Figure 11. Output Impedance vs. Frequency, Disabled State
Figure 14. Power Supply Rejection vs. Frequency
REV. B
-5-
AD8024
-30 G=2 VS = 7.5V VO = 2V p-p
SLEW RATE - V/ s
3000 RL = 150 2500 G = +2 2000 G = +1 G = +10 1500
HARMONIC DISTORTION - dBc
-40
-50
2ND
-60 3RD -70
1000
G = -1
-80
500
-90 1 10 FREQUENCY - MHz 100
0 2 4 6 8 SUPPLY VOLTAGE - 10 V 12
Figure 15. Harmonic Distortion vs. Frequency, RL = 150
Figure 18. Maximum Slew Rate vs. Supply Voltage
0 10 20
3
180
CLOSED-LOOP GAIN (NORMALIZED) - dB
2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 1 10 100 FREQUENCY - MHz -270 1000 VS = 7.5V -180 -90 PHASE VS = 12V GAIN 90
30 40 VS = 50 VS = 60 70 80 1 10 FREQUENCY - MHz 100 7.5V 2.5V
0
Figure 16. Crosstalk vs. Frequency, G = 2, RL = 150
Figure 19. Closed-Loop Gain and Phase vs. Frequency, G = 1, RL = 150
1200
CLOSED-LOOP GAIN (NORMALIZED) - dB
2
180 GAIN 90 PHASE VS = 2.5V 0
VS = 7.5V RL = 150 1000
1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 1
800 G = +10 600 G = +2
G = -1
-90 VS = 7.5V -180
400 G = +1 200
0
0
1
2 3 4 OUTPUT VOLTAGE STEP - V p-p
5
6
10 100 FREQUENCY - MHz
-270 1000
Figure 17. Slew Rate vs. Output Step Size
Figure 20. Closed-Loop Gain and Phase vs. Frequency, G = 2, RL = 150
-6-
REV. B
PHASE SHIFT - Degrees
SLEW RATE - V/ s
PHASE SHIFT - Degrees
CROSSTALK - dB
AD8024
1 CLOSED LOOP GAIN (NORMALIZED) - dB 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 1 10 100 FREQUENCY - MHz -270 1000 -180 VS = 7.5V -90 PHASE 0 GAIN VS = 12V 90 180
2V
20ns
PHASE SHIFT - Degrees
VIN
VOUT
2V
Figure 21. Closed-Loop Gain and Phase vs. Frequency, G = 10, RL = 150
Figure 24. Large Signal Pulse Response, Gain = 1 (RFB = 5 k, RL = 150 , VS = 7.5 V)
1
180 GAIN
250mV 20ns
CLOSED-LOOP GAIN (NORMALIZED) - dB
0 -1 -2 PHASE -3 -4 -5 VS = -6 -7 -8 -9 1 10 100 FREQUENCY - MHz -270 1000 -180 7.5V -90 VS = 12V 0 90
PHASE SHIFT - Degrees
VIN
VOUT
500mV
Figure 22. Closed-Loop Gain and Phase vs. Frequency, G = -1, RL = 150
Figure 25. Small Signal Pulse Response, Gain = 2 (RFB = 750 , RL = 150 , VS = 7.5 V)
500mV
20ns
1V
20ns
VIN
VIN
VOUT
VOUT
500mV
2V
Figure 23. Small Signal Pulse Response, Gain = 1 (RFB = 5 k, RL = 150 , VS = 7.5 V)
Figure 26. Large Signal Pulse Response, Gain = 2 (RFB = 750 , RL = 150 , VS = 7.5 V)
REV. B
-7-
AD8024
50mV 20ns
500mV
20ns
VIN
VIN
VOUT
VOUT
500mV
500mV
Figure 27. Small Signal Pulse Response, Gain = 10 (RFB = 400 , RL = 150 , VS = 7.5 V)
Figure 29. Small Signal Pulse Response, Gain = -1 (RFB = 909 , RL = 150 , VS = 7.5 V)
200mV VIN
20ns
2V
20ns
VIN
VOUT
VOUT
2V
2V
Figure 28. Large Signal Pulse Response, Gain = 10 (RFB = 400 , RL = 150 , VS = 7.5 V)
Figure 30. Large Signal Pulse Response, Gain = -1 (RFB = 909 , RL = 150 , VS = 7.5 V)
-8-
REV. B
AD8024
General Driving Capacitive Loads
The AD8024 is a wide bandwidth, quad video amplifier. It offers a high level of performance on 16 mA total quiescent supply current for closed-loop gains of 1 or greater. Bandwidth up to 380 MHz, low differential gain and phase errors, and high output current make the AD8024 an efficient video amplifier. The AD8024's wide phase margin and high output current make it an excellent choice when driving any capacitive load.
Choice of Feedback Resistor
When used in combination with the appropriate feedback resistor, the AD8024 will drive any load capacitance without oscillation. In accordance with the general rule for current feedback amplifiers, increased load capacitance requires the use of a higher feedback resistor for stable operation. Due to the high open-loop transresistance and low inverting input current of the AD8024, large feedback resistors do not create large closed-loop gain errors. In addition, the high output current allows rapid voltage slewing on large load capacitors. For wide bandwidth and clean pulse response, an additional small series output resistor of about 10 is recommended.
RF +VS RG 1.0 F 0.1 F - RS 1.0 F 0.1 F -VS CL
Because it is a current feedback amplifier, the closed-loop bandwidth of the AD8024 may be customized with the feedback resistor. A larger feedback resistor reduces peaking and increases the phase margin at the expense of reduced bandwidth. A smaller feedback resistor increases bandwidth at the expense of increased peaking and reduced phase margin. The closed-loop bandwidth is affected by attenuation due to the finite output resistance. The open-loop output resistance of 6 reduces the bandwidth somewhat when driving load resistors less than 150 . The bandwidth will be 10% greater for load resistance above a few hundred ohms. The value of the feedback resistor is not critical unless maintaining the widest or flattest frequency response is desired. Table I shows the bandwidth at different supply voltages for some useful closedloop gains when driving a 150 load. The recommended resistors are for the widest bandwidth with less than 2 dB peaking.
Table I. -3 dB Bandwidth vs. Closed-Loop Gain Resistor, RL = 150 VS - Volts 7.5 Gain +1 +2 +10 -1 +1 +10 -1 +2 RF - 5000 750 400 750 8000 215 750 1125 BW - MHz 350 275 105 165 380 150 95 125
AD8024
VIN RT +
VO
Figure 31. Circuit for Driving a Capacitive Load
1V 20nS
VIN
VOUT
2V
12 2.5
Figure 32. Pulse Response Driving a Large Load Capacitance, CL = 300 pF, G = 3, RFB = 2.32 k, RS = 10.5 , RL = 1 k, VS = 7.5 V
REV. B
-9-
AD8024
Overload Recovery Disable Mode Operation
The most important overload conditions are: Input Common-Mode Voltage Overdrive Output Voltage Overdrive Input Current Overdrive. When configured for a low closed-loop gain, the AD8024 recovers quickly from an input common-mode voltage overdrive; typically in <25 ns. When configured for a higher gain and overloaded at the output, recovery from an output voltage overdrive is also short; approximately 55 ns (see Figure 33). For higher overdrive, the response is somewhat slower. For 100% overdrive, the recovery time is substantially longer. When configured for a high noninverting gain, a high input overdrive can result in a large current into the input stage. Although this current is internally limited to approximately 30 mA, its effect on the total power dissipation may be significant. See also the warning under Maximum Power Dissipation.
1V 50ns
When the Disable pin is tied to DGND, all amplifiers are operational, in the enabled state. When the voltage on the Disable pin is raised to 1.6 V or more above DGND, all amplifiers are in the disabled, powered-down state. In this condition, the DISABLE pin sources approximately 0.1 A, the total quiescent current is reduced to approximately 500 A, all outputs are in a high impedance state, and there is a high level of isolation from inputs to outputs. The output impedance in the disabled mode is the equivalent of all external resistors, seen from the output pin, in parallel with the total disabled output impedance of the amplifier, typically 20 pF. The input stages of the AD8024 include protection from large differential input voltages that may be present in the disabled mode. Internal clamps limit this voltage to 1.5 V. The high inputto-output isolation is maintained for voltages below this limit.
VIN
VOUT
5V
Figure 33. 15% Overload Recovery, Gain = 10 (RFB = 400 , RL = 1 k, VS = 7.5 V)
-10-
REV. B
AD8024
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead Plastic SOIC (R-16A)
0.3937 (10.00) 0.3859 (9.80) 0.1574 (4.00) 0.1497 (3.80)
16 1 9 8
0.2440 (6.20) 0.2284 (5.80)
PIN 1
0.050 (1.27) BSC
0.0688 (1.75) 0.0532 (1.35)
0.0196 (0.50) 0.0099 (0.25)
45
0.0098 (0.25) 0.0040 (0.10)
8 0.0192 (0.49) SEATING 0 0.0099 (0.25) PLANE 0.0138 (0.35) 0.0075 (0.19)
0.0500 (1.27) 0.0160 (0.41)
REV. B
-11-
PRINTED IN U.S.A.
C01054-0-6/00 (rev. B)

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